Semiconductor Industry Outlook 2026

Insights

Executive summary

The semiconductor industry entered 2026 from a position of strength. After years of steady growth, the market surged in 2024 and accelerated further in 2025, reaching $923 billion in revenues — a 26% increase over the previous year. This growth spans the entire ecosystem and is analyzed in depth in this outlook (Figure 1).

Outlook 2026 consolidates the semiconductor value chain into three segments — design, manufacturing and enablers — replacing the category-by-category approach used in Outlook 2025. Revenue figures for market sizing are drawn from company filings across the full semiconductor value chain, covering approximately 50 companies that collectively represent the industry. This replaces the WSTS-based estimates used in Outlook 2025. WSTS estimates are based on revenues from semiconductors sold into the market, reported by participating companies, covering IDMs and fabless companies. As such, WSTS reflects semiconductor product revenues rather than the full value chain, making its market size estimates narrower than the universe covered in this report.

Figure 1. Semiconductor value chain

Source: Infosys Knowledge Institute

Revenues for 2026 are expected to diverge based on how artificial intelligence (AI) investment scales and how supply side constraints evolve (Figure 2). Infosys analysis using scenario‑based modeling suggests that, in an as-is scenario, assuming average growth from the past two years, revenues are set to grow 23% to around $1.1 trillion.

Figure 2. Industry revenues expected to diverge meaningfully based on AI investments and supply-side constraints

Revenue is reported on a calendar‑year basis. Each calendar year represents the sum of financial results from Q4 of the preceding year through Q3 of the stated year. Calculations may vary slightly due to rounding.

The WSTS Spring 2026 forecast, published after this analysis was completed, projects 2026 revenues at $1.5 trillion, ~90% year-over-year growth, a significant upward revision that underscores the accelerated scenario as increasingly likely.

Source: Infosys Knowledge Institute

An accelerated scenario, with AI infrastructure buildout and faster capacity ramp‑ups, could push revenues to $1.2 trillion. A constrained scenario, shaped by supply‑chain bottlenecks, delayed demand, energy crisis, and high inflation, could limit growth to under $1 trillion. This range reflects both the scale of AI opportunity and the execution risks in 2026.

State of the industry

Design, comprising fabless and IP companies, and manufacturing, comprising foundries and integrated device manufacturers (IDMs), each account for roughly 40% of industry revenues. The remaining 20% comes from enablers that support chip production at both ends of the value chain (Figure 3). Upstream enablers provide manufacturing equipment and tools, while downstream enablers focus on packaging, assembly, and testing.

Figure 3. Industry segments and contribution to revenue

Industry revenue encompasses an analysis for 50 companies across the three segments of the value chain. Samsung was excluded from the financial analysis as segment-level financial data for its semiconductor entity is not publicly disclosed at the required level of granularity.

Source: Infosys Knowledge Institute

While this 40-40-20 split appears balanced, it masks concentration within design. Unlike enablers, which are fragmented, design is heavily polarized, with Nvidia emerging as a single, outsized revenue driver. Its scale materially inflates design’s share of total revenues. Excluding Nvidia, design falls to 25%, manufacturing rises to 51%, and enablers expand to 24%. This adjusted view highlights the dominant role of manufacturing and enablers.

The industry is also splitting along a second axis: AI versus non‑AI demand. AI chips are transforming data centers, enabling advanced edge computing, and redefining electronics capabilities. Yet, this demand spike has raised questions on whether today’s AI‑fueled growth is sustainable, given concerns around circular financing loops. In these loops, a small group of companies simultaneously act as buyers, sellers, and financiers of AI infrastructure, recycling capital within the ecosystem. Such roundtrip transactions can inflate reported demand and valuations, blurring the line between organic market growth and financially engineered demand.

Below, we examine industry performance across key financial indicators — revenue, profitability, capital expenditure (CapEx), and research and development (R&D) spending — based on Infosys analysis of publicly disclosed company financials. All figures are reported on calendar year basis, where each calendar year represents Q4 of the preceding year to Q3 of the stated year.

Revenue

Semiconductor revenues continue to climb, sustaining a strong upward trajectory even as growth normalizes across select segments.

Profitability

The semiconductor industry posted significant net income gains over the past two years, reflecting pricing power in high‑demand AI‑centric products. Design leads in both absolute profitability ($132 billion) and growth, posting 90% year over year gains in 2024, followed by a further 52% increase in 2025, driven by Nvidia, AMD, Broadcom, and Marvell Technology (Figure 4).

Figure 4. Design and IDMs fuel sharp semiconductor profit growth

Source: Infosys Knowledge Institute

Within manufacturing, foundries delivered steady net income growth of 46% in 2025. IDM profitability increased sharply in aggregate, driven mainly by Micron Technology and SK Hynix, whose combined net income rose from $8.3 billion to $33.5 billion on surging demand for high-bandwidth memory (HBM) and high-capacity memory in data centers. Intel’s return to profitability, supported by management restructuring and CHIPS Act incentives that eased cost pressures, provided additional uplift.

Among enablers, equipment manufacturers posted 25% net income growth in 2025. Packaging companies saw largely flat to modest net income growth, despite rising revenues and CapEx.

Strong investment in advanced packaging capacity for AI workloads weighed on near-term profitability through higher ramp-up costs. ASE outperformed peers due to scale and earlier exposure to high margin advanced packaging, while others remained in an investment phase, positioning for medium-term margin expansion.

CapEx and R&D

Design posted the strongest CapEx expansion, rising over 60% in 2025 (Figure 5), anchored by sharp step-ups from Nvidia (+165%) and Arm Holdings (+275%), reflecting accelerated AI investment.

Figure 5. Manufacturing leads CapEx, but design expands fastest

Source: Infosys Knowledge Institute

IDMs and foundries dominate in absolute CapEx but showed moderate growth. Among IDMs, SK Hynix and Micron Technology led incremental increases — Micron’s $2.75 billion in India expands assembly and testing capacity to diversify its back-end supply chain, complementing larger dynamic random access memory (DRAM) and HBM-focused fab investments in the US.

Equipment manufacturers posted steady CapEx growth of over 33% in 2025, driven by rising demand for wafer fabrication and packaging and testing equipment tied to HBM and graphics processing unit (GPU) production. Packaging companies rebounded from a 2024 CapEx decline, increasing investments despite muted near term profits, as they build advanced packaging capacity to strengthen supply chain resilience amid rising tariffs and geopolitical pressures.

Demand drivers

Data centers, servers, storage

The primary growth driver for semiconductors is the scale of global AI infrastructure investment. Worldwide data center CapEx surged 57% year over year in 2025, with the top four US hyperscalers increasing their spend by 76%. In 2026, data center CapEx is expected to surpass $1 trillion, supported by the deployment of more than 10 million high-end AI accelerators — chips purpose-built to handle intensive AI computation — alongside investment in servers, storage, networking, and power infrastructure. This surge is driving unprecedented demand for high-performance processors, advanced memory, and sophisticated manufacturing equipment.

Data center and server demand had become structurally dominant. As per Infosys analysis based on company annual reports, data center and server demand accounts for roughly 90% of Nvidia’s revenue, about half of AMD’s revenue, and nearly one-fourth of Intel’s semiconductor business (Figure 6). Together, these trends show that AI data center buildouts now set the demand tempo for silicon, memory, equipment, and advanced packaging across the semiconductor value chain.

Figure 6. Segment revenue for key players

Source: Infosys Knowledge Institute

Automotive

Despite near-term softness in automotive and electric vehicle (EV) chip demand, driven by inventory corrections, policy shifts, and uneven regional EV adoption, automotive remains a structural, long-term growth driver for semiconductors. The shift to software-defined vehicles (SDVs) is making smart chips indispensable for processing sensor data and enabling adaptive cruise control, lane-keeping assist, and autonomous driving, features increasingly demanded by consumers. Growing 5G integration for vehicle-to-everything (V2X) communication — where vehicles exchange data with other vehicles, road infrastructure, and networks — is adding further demand for real-time processing and control chips. Ultra-premium and performance segments are driving uptake of silicon as luxury original equipment manufacturers (OEMs) pursue proprietary compute stacks and differentiated in-vehicle experiences.

This transition is supported by long-cycle capacity investments in automotive-grade semiconductors. A defining example is the TSMC-led European Semiconductor Manufacturing Company fab in Germany, a joint venture with Bosch, Infineon, and NXP, representing more than €10 billion ($11 billion) in investment, designed to produce automotive-grade logic and mixed-signal chips for SDV, ADAS, and in-vehicle networking platforms.

Consumer electronics

Consumer electronics remains an important but slower growing semiconductor demand contributor, with limited near-term potential for step-change growth. Newer form factors such as foldables, smart glasses, smart rings, and immersive devices continue to attract attention, but their market scale and hardware maturity remain insufficient to materially lift overall semiconductor volumes.

Smartphones and PCs face an uneven recovery, constrained by longer replacement cycles and rising device prices as DRAM and NAND capacity shifts toward AI workloads. Within smartphones, iPhone17 stands out for sustaining demand momentum despite incomplete AI features, suggesting consumers are becoming more cautious about near‑term AI promises and more willing to purchase hardware without waiting for fully realized AI capabilities. Overall, consumer electronics continues to provide moderate revenue support to the industry.

Industrial electronics

Industrial electronics remains a durable, demand engine, with edge AI adoption rising steadily as IoT and embedded platforms integrate on-device inference. As per WSTS, the industrial segment returned to growth in 2025, posting a 5% increase as inventory corrections and weak CapEx conditions from previous years gradually eased.

Manufacturing, healthcare, agriculture, and energy are the primary demand drivers. Core demand is anchored in microcontrollers, sensor-interface ICs, and power management ICs. Because industrials rely heavily on mature or legacy nodes (≥28nm), securing reliable access to legacy manufacturing capacity has become a strategic priority across the US, Europe, and Asia, reflected in regional policies focused on supply‑chain resilience.

Telecom

Telecom and connectivity remain steady, though moderate, semiconductor demand drivers in an AI‑skewed market. Demand continues to expand, as 5G monetization and network upgrades persist. Consumer adoption of 5G fixed wireless access (FWA), where 5G delivers high-speed home broadband, remains a key anchor.

The global 5G FWA market reached $25 billion in 2025, growing between 18% and 20% CAGR, led by North America, as operators deploy 5G broadband rather than building fiber infrastructure.

In parallel, 5G densification, early 6G preparation, and the shift from copper to optical interconnects are accelerating adoption of silicon photonics — chips that use light to move data at higher speeds and lower power. This is reinforcing long‑term demand for optical connectivity as well as specialized communication semiconductors.

Key technologies

Shift to advanced nodes

The industry is at a critical inflection point as leading foundries move beyond FinFET, the long‑standing architecture used at advanced nodes, to 2nm‑class gate‑all-around (GAA) architectures that offer better power control as chip dimensions shrink. TSMC’s N2, its first GAA node, entered volume production in late 2025, while Samsung is advancing its earlier GAA technology from 3nm to 2nm (Figure 7). Intel’s 18A combines a RibbonFET GAA transistor with backside power delivery, a design that routes power from beneath the chip to improve efficiency and reduce congestion. These changes deliver meaningful gains in power efficiency, reduce electrical leakage or wasted current — increasingly critical for AI accelerators, high-performance computing, and premium mobile chips. As manufacturing complexity rises and advanced EUV and emerging High‑NA lithography tools, needed to print extremely small features, become capacity constraints, early 2nm production is concentrated among a limited set of high‑value customers.

Figure 7. Timeline of key milestones in transition to advanced nodes

Source: Infosys Knowledge Institute

Advanced packaging

As transistor scaling enters the 2nm and GAA era, advanced packaging and miniaturization have become essential to extend performance and energy efficiency beyond what node shrinks alone can deliver. Advanced packaging now accounts for most of the packaging segment’s growth, expanding at roughly 10% CAGR through the decade. This shift has redrawn segment boundaries: foundries, which historically focused on wafer manufacturing, are moving deeper into advanced packaging, a dynamic termed Foundry 2.0.

At the same time, 2.5D and 3D packaging capacity remains limited at both foundries and packaging companies, reflecting high costs and the difficulty of scaling these processes quickly. As a result, value creation is shifting toward system-level integration, with packaging capacity increasingly determining the pace of AI hardware deployment.

Custom silicon

Custom silicon has emerged as a defining demand-side shift, moving the market beyond a GPU-first mindset. Hyperscalers like Google, Amazon, Microsoft, and Meta are now active chip architects, designing custom application‑specific chips (ASICs) built for their own workloads tightly aligned with their proprietary software stacks and infrastructure economics. Cloud service providers' ASIC-based AI server shipments are projected to grow approximately 45% in 2026, against GPU-based AI server shipment growth of 16%, underscoring the accelerating shift toward custom silicon. Broadcom, a primary design partner for most hyperscalers and the clearest beneficiary of this shift, projects its AI chip revenue to exceed $100 billion by 2027.

Memory market transformation

The memory market is undergoing a structural shift as AI workloads redefine demand, economics, and supply priorities. HBM has become the primary growth engine: DRAM revenue tripled from $50 billion in 2023 to over $150 billion in 2025.

HBM’s share of DRAM is projected to grow from 5% to 50% between 2023 and 2028, reflecting its premium pricing and central role in AI systems. As suppliers reallocate capacity toward HBM and high‑density server DRAM, conventional DRAM and NAND markets face tighter supply, higher pricing, and greater customer concentration — marking a shift from cyclical recovery to an AI-driven memory supercycle.

AI-led design and manufacturing

AI’s influence is moving upstream into design automation and fab operations. At advanced nodes of chip sizes 5nm and below, where complexity and cost are rising sharply, AI techniques such as graph neural networks and reinforcement learning are being applied across physical design stages. This helps shorten the design cycles and optimize power‑performance‑area trade‑offs.

AI is also enhancing strategic decision-making in product design, enabling faster, more data-driven workflows while making human creativity and innovation more critical. In manufacturing, AI is cutting downtime, improving yield and pushing fabs toward greater autonomy through digital twins and smarter processes. AI is evolving from a productivity aid into a core scaling enabler across both design and manufacturing.

Market challenges

Geopolitics and supply chain

Semiconductor supply chains were always built on deep specialization, concentrating critical capabilities in a few geographies. Geopolitical tensions have turned these dependencies into strategic leverage points. Export controls, rare-earth restrictions, and fab subsidies are redrawing supply routes that took decades to build (Figure 8).

Figure 8. Geopolitical landscape impacting the semiconductor industry

Source: Infosys Knowledge Institute

China has emerged as a key actor shaping supply economics and geopolitical risk. Its share of global mature-node capacity has grown from 19% in 2015 to 33% in 2023, more than four times faster than global demand. The country is projected to account for nearly half of all new mature-node capacity additions in the next few years, cementing its dominance in this segment.

This is led by state subsidies that allow price undercutting that western fabs cannot match, hence creating oversupply and price deflation in the non-AI segment. Beyond fabrication, China also dominates the back‑end of the value chain — assembly, packaging, and testing — holding roughly 30% of global capacity, alongside 22% share of global substrate production.

Costs rise across AI value chain

Cost inflation has shifted from a cyclical to structural challenge. Since 2025, prices for leading-edge wafers have risen between 10% and 20%, driven by AI demand, rising process complexity, and higher capital intensity at advanced nodes. HBM and high-speed DRAM are projected to absorb 30% of global DRAM wafer capacity in 2026, keeping HBM pricing elevated through year-end.

Back-end bottlenecks are compounding system-level economics. Demand for advanced packaging and substrates continues to outpace capacity, with customers precommitting for lead times stretching beyond 12 months. Supply tightness is expected to extend late into 2026.

Power and sustainability

Power and water have shifted from compliance considerations to supply-side constraints. Leading-edge 3nm to 5nm facilities draw between 200 MW to 300 MW of power at scale, and an average chip facility consumes about 10 million gallons of water daily — as much water as is used by 33,000 US households every day. Energy and water intensity per wafer continues to rise with EUV lithography and 2.5D/3D packaging, with water availability emerging as the tightest bottleneck in key hubs.

Tightening environmental regulations are adding further pressure: fab funding and expansion can be delayed or constrained by wastewater treatment capacity, hazardous‑waste disposal plans, and local permitting thresholds. This makes utilization increasingly dependent on downstream regulatory and infrastructure limits rather than installed capacity alone.

Talent crunch

As new fabs break ground across the US, Europe, Japan, and India, shortages of technicians, process engineers, and plant‑level specialists are emerging as a primary execution risk, rivaling capital and infrastructure constraints.

Cybersecurity and IP protection

Firmware in lithography and EDA tools has emerged as a primary attack vector, while IP theft cases are escalating into criminal legal action.

As design, fabrication, and packaging workflows grow more distributed and geopolitically exposed, state‑sponsored intrusions and supply‑chain compromise are increasingly shaping risk assessments and investment decisions.

Strategic imperatives

Capitalize with caution

Capturing AI-driven growth requires a balance across innovation, partnership, and portfolio resilience. Leaders should pursue service-centric, platform-oriented business models, deepen co-design relationships with hyperscalers, and invest selectively in domain-specific silicon. AI-heavy revenue exposure must be offset with countercyclical end markets such as automotive and industrials to mitigate concentration risk if AI investment cycles moderate.

Rethink talent strategy

Semiconductor leaders must rethink roles, training models, and workforce composition, augmenting human expertise with intelligent automation and robotics. This means defining AI‑native roles spanning design automation, model‑based verification, predictive maintenance, and autonomous process optimization. To close talent gaps, companies should deploy physical AI and robotics, embed deep‑tech upskilling, and expand talent pipelines through partnerships with universities, governments, and research institutions.

Reconfigure for resilience

Leaders must redesign supply chains for geopolitical resilience, not just cost efficiency. This requires building regionally distributed manufacturing and back-end ecosystems that can withstand export controls and technology bifurcation. Countries in Southeast Asia, particularly the Philippines, Thailand, Vietnam, and Malaysia, are emerging as a resilient hub for assembly, packaging, and testing, offering diversification while preserving scale, flexibility, and operational continuity.

Secure advanced packaging early

Advanced packaging has become the binding constraint for AI and high-end compute. Packaging lines are fully booked, lead times extend between nine and 12 months, and hyperscalers are prepaying for capacity. Leaders must secure advanced packaging capacity early and treat it as a strategic lever for revenue capture and time-to-market advantage. Value is shifting toward system-level integration, repositioning packaging from a backend cost to a profit center.

Enhance data and IP security

Protecting semiconductor IP is increasingly critical as design and manufacturing workflows fragment across cloud platforms, partners, and geographies. Risks now extend beyond cyber intrusions to human vectors, including targeted hiring to extract proprietary know‑how. Leaders must adopt zero‑trust architectures across the design‑to‑fab life cycle, secure cloud‑based EDA workflows, and enforce encryption and traceability, especially as chiplet ecosystems expand attack surfaces.

As the semiconductor industry enters 2026, it faces an intersection of opportunity and rising structural complexity. AI‑driven demand is redefining growth across logic, memory, packaging, and infrastructure, while geopolitics, energy constraints, and talent shortages shape execution risk. The next phase of industry leadership will depend on strategic discipline — how effectively companies allocate capital, secure critical capabilities, and adapt to a more fragmented, AI‑centric world.

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