Silicon and VLSI Engineering

Automate VLSI design and layout verification

Overview

The Infosys High Tech practice offers silicon-to-systems services spanning board design to management of Application Specific Integrated Circuit (ASIC), Application Specific Standard Product (ASSP) and Field Programmable Gate Array (FPGA) devices. Our silicon and Very Large Scale Integration (VLSI) engineering services address challenges in design and layout verification for microchips in automotives, communications and computing systems, medical instrumentation, and wireless electronic devices.

Our expertise in product engineering and silicon technology ensures excellence across the VLSI product lifecycle. We adopt the GDS II standard for seamless transfer of IC data between design tools, and sharing of IC layout artwork with silicon foundries and semiconductor fabrication plants.

We undertake board-level as well as system-level thermal analysis and signal integrity analysis for analog, digital and mixed signal circuits. We evaluate the electromagnetic profile of printed circuit boards and identify hotspots to better manage emissions from radiation. Our experts recommend decoupling schemes based on comprehensive power integrity analysis that includes voltage drop and noise analysis.

Infosys data analytics solutions ensure ‘first time right’ for high capacity chipsets. The analysis of simulation results and silicon failure reports provides insights to apply automation and streamline testing and quality processes. Our approach improves yields, accelerates time-to-market, and enhances the efficiency of silicon wafers. Our VLSI engineers optimize physical designs to achieve target power and performance for a given board area.

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Challenges & Solutions

Team of VLSI experts creates high-level representations of digital circuit designs using hardware description languages such as Verilog and VHDL.

Rich experience across tools for compilation, simulation, virtual prototyping, and Electronic Design Automation (EDA).

Expertise in debugging test environments and eliminating syntax errors from design code for integrated circuits and printed circuit boards.